The TLG GPIP is based on the
commercially available
General Purpose IndustryPack Module
from BIRA Systems. It is used to delay signals used to generate
Booster, Main Injector and Tevatron TCLK reset events
and also events $08 and $1A.
The TLG GPIP is also used to read the status of the "NTF
Priority Request" line.
Another feature of the TLG GPIP module is that it can be used to transmit a single MDAT frame. This feature is no longer used as the frames are sourced from an 8 Frame MDAT Transmitter GPIP module
Base address = 0xFFF58200 | ||||
---|---|---|---|---|
Offset | ID | Description | Device Name | Default value |
0x00 | Counter 0 | BMIN delay (Triggered by BMIN) | B:RSTDLY | 64584 (0xFC48) |
0x08 | Counter 1 | 15HZ delay for MI Resets | T:RSTDL1 | 1 |
0x10 | Counter 2 | $1A Request (Triggered by Timer 0 output) | T:RSTD1A | 2100 (0x0834) |
0x18 | Counter 3 | $08 Request | T:RSTDL3 | 3000 (0x0BB8) |
0x20 | Counter 4 | Not used | T:RSTDL4 | 1 |
0x28 | Counter 5 | Not used | T:RSTDL5 | 1 |
0x30 | Counter 6 | Not used | T:RSTDL6 | 1 |
0x38 | Counter 7 | IP Interrupt 0 | T:RSTDL2 | 1 |
  | ||||
x040 | Control register | [15..13]=IP interrupt enable[2..0] [6..0] Timer enable 6..0 (7 is always enabled) |   | 0xA083 |
0x42 | Status Register | [15..8]=switches 0=NTF Priority Request |   | 0x0301 |
  | ||||
0x60 | Interrupt vector register 0 |   |   | 0x0040 |
0x62 | Interrupt vector register 1 |   |   | 0 |
0x64 | Interrupt vector register 2 |   |   | 0 |
  | ||||
0x66 | MDAT data register | No longer used |   | 0 |