Hardware Design Note 107.00
C1200 Tevatron Clock Generator
Walter Knopf, July 18, 1991
I. General Description.
The Tevatron Clock Generator (TCG) is a CAMAC resident module that provides (as the name implies) serial timing generation, using the same encoding as the Accelerator Division's Tevatron Clock Generator and most of the features of the Tevatron Clock Master source module - the Time Line Generator (TLG). The C1200 module's serial output is clocked at 10 Mbits/sec., using modified Manchester code; in the idle state continuous bits of 'zero' are transmitted to maintain phase lock in receivers using phase locked loop circuits. Each clock event consists of a single 8 bit byte, preceded by a start bit and followed by a parity bit, thus providing a potential 256 unique events. One single C1200 module will be the source for all clock signals in the beam lines and experimental areas, with multiple repeater modules distributing and restructuring the clock throughout the system.
The C1200 module has two modes of operation,
a) L O C A L and
b) R E M O T E .
II. Local Mode of Operation.
This mode allows for stand alone clock generation (independent of the Acccelerator Division's Tevatron Clock) from a table of times and associated clock events. Total cycle time from reset event (T1) to reset event is remotely programmable, as well as all other clock events as a function of time after reset.
Timing resolution in this mode shall be 1 usec with a range of 0 to 232-1, resulting in a maximum master cycle of over 70 minutes. The source for all timing generation shall be selectable and to be derived from one of two sources:
TevClock signal (preferred) as a source of the 10 MHz, 720 Hz, and 15 Hz events.
Local oscillator; the 15 Hz event is synchronized to the line frequency via a zero crossing detector, the 10 MHz is sourced by a crystal oscillator and the 720 Hz is a function of the 15 Hz clock and a cycle counter.
III. Remote Mode of Operation.
In this mode the TCG MUST receive an external Tevatron Clock input to be functional. All decoded (received) clock events are re transmitted after passing through an event translation table. This allows the suppression (no clock event is generated) or translation (a particular incoming clock event generates an output with a different event number) of all Tevatron Clock events on a selective basis. This table is maintained in non-volatile memory and remotely programmable.
Hardware timing signals such as the 15 Hz (event 0x0f) and 720 Hz (event 0x07) should be passed without modifications. Locally generated events derived from external hardware triggers or from a resident timing/event state machine (see local mode) can be OR'ed with the output of the translation table, thus allowing local events to be superimposed on the Tevatron Clock in the REMOTE mode.